1. Field of the Invention
The present invention relates to a direct current measuring apparatus, which is applied to a direct current test apparatus such as an IC tester, for applying a desired voltage to a load to measure a current flowing through a load or supplying the load with a desired current to measure a voltage across the load, and in particular, to a direct current measuring apparatus capable of limiting an overcurrent flowing through the load and an overvoltage applied to the load.
2. Description of the Related Art
An example of a conventional direct current measuring apparatus of this type is illustrated in FIG. 7.
This direct current measuring apparatus applies a desired voltage to a load being a measuring object to measure a current flowing in that load and comprises, as illustrated in FIG. 7, a voltage generating part 1 generating a voltage to be applied to a load 4 being a measuring object; a current limiting part 2 limiting a current flowing in the load 4 to a set value; and an output terminal 3 connected to the load 4 (see Japanese Patent Laid-Open No. 3-183967).
The voltage generating part 1 comprises a D/A converter (DAC) 11; a main amplifier 12; an inverter 13, a current sensing resistor 14; a buffer circuit 15; a differential amplifier 16 and the like.
In further detailed description, the D/A converter 11 converts a set voltage value, which is a digital value corresponding to a voltage for generating a set voltage, to an analog voltage corresponding to that value. The main amplifier 12 is configured by an operational amplifier and supplies its non-inverting input terminal (+ input terminal) with an analog voltage output from the D/A converter 11 through a resistance Ri. An inverting input terminal (− input terminal) of the main amplifier 12 is grounded through a resistance Rs. A capacitor Cs is brought into connection between an output terminal and the inverting input terminal of the main amplifier 12.
The output terminal of the main amplifier 12 is connected to the output terminal 3 through the inverter (inverting circuit) 13 and the current sensing resistor 14; and its output terminal 3 is connected to a non-inverting input terminal of the main amplifier 12 through the buffer circuit 15 and a feedback resistance Rf. Accordingly, the main amplifier 12 configures a negative feedback amplifier circuit.
Here, the main amplifier 12 comprises a protection circuit with a diode brought into parallel connection in the mutual opposite directions on its input side.
The current sensing resistor 14 detects a load current (output current) Io flowing in the load 4 and its both ends are connected to an inverting input terminal and a non-inverting input terminal of the differential amplifier 16.
The current limiting part 2 comprises a D/A converter 21, a positive side limiting circuit 22, a D/A converter 23 and a negative side limiting circuit 24.
In further detailed description, the D/A converter 21 generates a positive voltage derived by multiplying a current-limit value to be set on the positive side with a resistance value of the current sensing resistor 14 to output this positive voltage.
The positive side limiting circuit 22 is configured, as illustrated in FIG. 7, by an operational amplifier 221; an input resistance R1p and R2p; a diode D1p; and a feedback resistance R3p. 
The inverting input terminal of the operational amplifier 221 is supplied with an output voltage of the D/A converter 21 through the input resistance R1p; and is supplied with an output voltage of the differential amplifier 16 through the input resistance R2p. The non-inverting input terminal of the operational amplifier 221 is grounded. An output terminal of the operational amplifier 221 is connected to a non-inverting input terminal of the main amplifier 12 through the diode D1p. In addition, an output terminal of the operational amplifier 221 is connected to an inverting input terminal of the operational amplifier 221 through the diode D1p and the feedback resistance R3p. 
The D/A converter 23 generates a negative voltage derived by multiplying a current-limit value to be set on the negative side with a resistance value of the current sensing resistor 14 to output this negative voltage.
The negative side limiting circuit 24 is configured, as illustrated in FIG. 7, by an operational amplifier 241; an input resistance R1n and R2n; a diode D1n; and a feedback resistance R3n. 
The inverting input terminal of the operational amplifier 241 is supplied with an output voltage of the D/A converter 23 through the input resistance R1n; and is supplied with an output voltage of the differential amplifier 16 through the input resistance R2n. The non-inverting input terminal of the operational amplifier 241 is grounded. An output terminal of the operational amplifier 241 is connected to a non-inverting input terminal of the main amplifier 12 through the diode D1n. In addition, an output terminal of the operational amplifier 241 is connected to an inverting input terminal of the operational amplifier 241 through the diode D1n and the feedback resistance R3n. 
Next, an operation example of such a conventional apparatus will be described with reference to FIG. 7.
At first, the case where the voltage generating part 1 applies a desired voltage to the load 4 to measure a current flowing in the load 4 will be described.
In that case, the main amplifier 12 operates so that an output voltage Vout of the output terminal 3 is equal to the set voltage of a set voltage value being set in the input of the D/A converter 11. That set voltage is applied to the load 4. At that time, a load current Io flowing in the load 4 flows in the current sensing resistor 14. A voltage corresponding to the load current Io occurs in the both ends of the current sensing resistor 14. There, the differential amplifier 16 takes out a voltage corresponding to the size of the load current Io. That voltage is converted to a digital value with an A/D converter (not illustrated in the drawing). The load current Io is displayed on an indicator and the like not illustrated in the drawing based on a digital value thereof.
Next, operations of the current limiting part 2 in the case where the load 4 is an IC (integrated circuit), for example, and the IC is out of order will be described.
Here, when the load current Io flowing toward the load 4 becomes an overcurrent and the absolute value of the negative output voltage of the differential amplifier 16 gets larger than the positive output voltage of the D/A converter 21, the output voltage of the operational amplifier 221 of the positive side limiting circuit 22 becomes a positive voltage. That positive voltage is negatively fed back to the inverting input terminal of the operational amplifier 221 through the reverse-current preventing diode D1p and, moreover, through the negative feedback resistance R3p and current limiting part 2 operates so that the voltage of that inverting input terminal becomes zero.
A positive voltage corresponding to the difference between the output voltage of the differential amplifier 16 and the output voltage of the D/A converter 21 appears at a common connection point of the diode D1p and the negative feedback resistance R3p. That positive voltage is applied to the non-inverting input terminal of the main amplifier 12. Therefore, the output voltage of the inverter 13, that is, the output voltage Vout of the output terminal 3 drops to operate so that the absolute value of the output voltage of the differential amplifier 16 is equal to the output voltage of the D/A converter 21. The load current Io is limited (clamped) to a positive current-limit value set in the D/A converter 21.
On the other hand, when the load current Io becomes an overcurrent in the case of heading for the side of the inverter 13, the negative side limiting circuit 24 operates likewise. The load current Io is limited to a negative current-limit value set in the D/A converter 23.
FIGS. 8A-8C are waveform diagrams that illustrate an example of deteriorated settling property in a conventional apparatus. FIG. 8A is a waveform diagram for an output voltage on the D/A converter 11 in the conventional apparatus. FIG. 8B is a waveform diagram of the Vout in the conventional apparatus when a limit value set is large. FIG. 8C is a waveform diagram of the Vout in the conventional apparatus when a limit value set is small.
In the conventional apparatus, in the case where the output voltage of the D/A converter 11 changes as illustrated in FIG. 8A and the output voltage Vout of the output terminal 3 changes corresponding thereto, the level of the positive and negative output voltages corresponding to the positive and negative current-limit values output from the D/A converters 21 and 23 gives rise to a defect that a difference in settling time of the output voltage Vout of the voltage generating part 1 (see FIGS. 8B and 8C) arises.
For example, the positive side limiting circuit 22 can be limited at the time of Vs>Vax(−R3p/R1p) with Vs being the voltage of the non-inverting input terminal of the main amplifier 12 and Va being a positive output voltage of the D/A converter 21 and, when that value (Vax(−R3p/R1p)) exceeds the potential Vs, the positive side limiting circuit 22 will be brought into an operation.
Consequently, in the case where the limit voltage of the positive side limiting circuit 22 is low, the limit voltage value drops corresponding thereto and the slew rate (settling time) of the output voltage Vout gets long compared with the case where the limit voltage is high (see FIGS. 8B and 8C).
Here, the maximum slew rate SR of the main amplifier 12 in FIG. 7 can be expressed by the following expression (1):SR=Vs/Rs/Cs   (1)
In addition, voltage settling indicative of a transient response of the output for the input of the main amplifier 12 gets worse on the following points when the voltage generating part 1 generates a voltage.
It is general that the load 4 is connected with a bypass capacitor CL in parallel.
FIGS. 9A-9C are waveform diagrams that illustrate an example of deteriorated settling property in a conventional apparatus. FIG. 9A is a waveform diagram for an output voltage on the D/A converter 11 in the conventional apparatus. FIG. 9B is a waveform diagram of the Vout in the conventional apparatus. FIG. 9C is a waveform diagram of a load current in the conventional apparatus.
In that case, the output voltage of the D/A converter 11 changes as illustrated in FIG. 9A. When this changes the output voltage Vout (see FIG. 9B), a current flows in the capacitor CL besides the load 4.
In the case where a current is supplied during settling, the following limitation gets effective with Vb being an output voltage of the differential amplifier 16:Vs>{Vax(−R3p/R1p)+Vbx(−R3p/R2p)}
Due to that limitation, the limitation will be applied at an output current lower than an actually determined limit value (see FIG. 9C). Accordingly, the positive side limiting circuit 22 carries out a current limiting operation at the time of a current lower than the set current-limit value, giving rise, therefore, to a defect that settling of the output voltage Vout gets worse (see FIG. 9B).
Accordingly, in the conventional apparatus, at the occasion when a voltage generating part generates a desired voltage, settling performance occasionally gets worse due to the set limit value of the current set in the current limiting part. That case is not preferable for making direct-current test faster and more accurate.
For the foregoing reasons, there is a need for a direct current measuring apparatus that can improve settling performance when measuring a signal level such as a current due to a set limit value of the signal to carry out speeding up and higher accuracy.
There is another need for a limiting circuit that can help the direct current measuring apparatus achieve its need.